$SNPS and $MSFT Launch Autonomous Chip-Design Workflows

Synopsys, $SNPS, has introduced two autonomous chip-design workflows developed with $MSFT, cutting debugging cycle times by approximately 40% in early testing.
$AMD is evaluating the technology for use in next-generation products, potentially accelerating complex semiconductor design and verification processes.
$SNPS also expanded support for $INTC’s 14A process and EMIB advanced packaging , alongside new high-speed interface IP.